1. Field of Invention
This invention relates to fabrication of an image sensor, and more particularly, to the fabrication of an embedded CMOS photodiode in the fabrication of an image sensor.
2. Description of Related Art
An image sensor comprises a photodiode, a dielectric structure on top of the photodiode, and an interlevel dielectric (ILD) layer overlying the dielectric layer. The photodiode utilizes a diode depletion region formed across a p-n junction. The photodiode receives light and outputs an electrical charge corresponding to the amount of light received. The electric charge is converted into current or voltage levels defining an image which is stored in digital memory. Recently, photodiodes formed as an n-well in a p-substrate, for example, have been built underlying shallow trench isolation (STI) on silicon semiconductor chips, due to low dark current and high quantum efficiency (QE), or the amount of current or charge produced per incident photon. All of the light that passes through the internal structure of the detector should be absorbed, but losses can occur due to light reflection or destructive interference.
FIG. 1 illustrates an image sensor of the prior art, such as described in U.S. Pat. No. 6,040,592 to McDaniel, et al. and U.S. Pat. No. 6,372,603 to Yaung et al. The image sensor comprises a well-to-substrate photodiode comprising p-substrate 10 and N-well 12. Oxide region 16 may be a shallow trench isolation (STI) region as shown or a local oxidation of silicon field oxide region as the dielectric structure covering the photodiode. Overlying the dielectric structure is an interlevel dielectric layer 20. CMOS device structures, including metal interconnect 30 and other devices, not shown, are formed in and on other portions of the substrate. Light 40 is shown entering the transparent dielectric layers and penetrating to the photodiode at 12. Some of this light is reflected 42 especially at an interface of two materials having a large difference in refraction indices, such as silicon dioxide (16)/silicon (12) where the refraction indices are 1.4 and 3.3, respectively.
The borderless contact process is used in the CMOS process to tighten the design rules and to increase circuit density by using a silicon nitride or silicon oxynitride stop layer. Borderless contacts or “unframed” contacts solve many of the micron and sub-micron MOSFET contact problems; making better use of the space and area over the source/drain region. If the borderless process is adopted for the image sensor, a dielectric structure having high refraction index/low refraction index/high refraction index will exist. FIG. 2 illustrates such a structure. Here, for example, a silicon oxynitride layer 18 has been formed overlying the STI region 16. Both SiON and silicon have a high refraction index and silicon dioxide has a low refraction index. The refraction index of SiON is about 1.8-2.5, higher than the 1.4 refraction index of silicon dioxide. Here, destructive interference 44 is seen when light penetrates to the photodiode. This destructive interference is caused by the presence of the silicon oxynitride layer.
U.S. Pat. No. 6,130,422 to Bawolek et al. shows a structure similar to that in FIG. 2 except that they add a buffer oxide layer underlying their silicon nitride layer. The buffer oxide layer is to relieve stress. The destructive interference will still be found in this structure. Borderless contacts are part of the advanced designs and processing associated with shallow trench isolation (STI). U.S. Pat. No. 6,406,987 to Huang and U.S. Pat. No. 6,258,712 to Wang both describe a borderless contact process with an etch stop.
What is required is a method to overcome losses and enhance the quantum efficiency of image sensors, with or without borderless contact processes.